A genuinely useful text that gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targeted application domain covers complex embedded real-time multi-media and communication applications. This material is mainly based on research at IMEC and its international university network partners in this area over the last decade. In all, the material those in the digital signal processing industry will find here is bang up-to-date.
"synopsis" may belong to another edition of this title.
Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogeneous Platforms gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targeted application domain covers complex embedded real-time multi-media and communication applications.
Many of these applications are concurrent in the sense that multiple subsystems can be running simultaneously. Also, these applications are so dynamic at run-time that the designs based on the worst case execution times are inefficient in terms of resource allocation (e.g., energy budgets). A novel systematical approach is clearly necessary in the area of system-level design for the embedded systems where those concurrent and dynamic applications are mapped. This material is mainly based on research at IMEC and its international university network partners in this area in the period 1997-2006. In order to deal with the concurrent and dynamic behaviors in an energy-performance optimal way, we have adopted a hierarchical system model (i.e., the gray-box model) that can both exhibit the sufficient detail of the applications for design-time analysis and hide unnecessary detail for a low-overhead run-time management. We have also developed a well-balanced design-time/run-time combined task scheduling methodology to explore the trade-off space at design-time and efficiently handle the system adaptations at run-time. Moreover, we have identified the connection between task-level memory/communication management and task scheduling and illustrated how to perform the task-level memory/communication management in order to obtain the design constraints that enable the this connection. A fast approach is also shown to estimate at the system-level, the energy and performance characterization of applications executing on the target platform processors.
Francky Catthoor is a leading researcher at IMEC and is very well established within the EDA community. He is IEEE Fellow and has edited and authored 6 books for Springer/Kluwer.
"About this title" may belong to another edition of this title.
Shipping:
FREE
Within U.S.A.
Book Description Condition: Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service. Seller Inventory # ABEOCT23-124845
Book Description Condition: New. Brand New Original US Edition.We Ship to PO BOX Address also. EXPEDITED shipping option also available for faster delivery.This item may ship from the US or other locations in India depending on your location and availability. Seller Inventory # ABTR-226401
Book Description Condition: New. Brand New Original US Edition. Customer service! Satisfaction Guaranteed. This item may ship from the US or our Overseas warehouse depending on your location and stock availability. We Ship to PO BOX Location also. Seller Inventory # ABRR-226401
Book Description Hardcover. Condition: new. Seller Inventory # 9781402063282
Book Description Condition: New. Seller Inventory # 5238336-n
Book Description Condition: New. Seller Inventory # ABLIING23Mar2411530144071
Book Description Condition: New. PRINT ON DEMAND Book; New; Fast Shipping from the UK. No. book. Seller Inventory # ria9781402063282_lsuk
Book Description Buch. Condition: Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -A genuinely useful text that gives an overview of the state-of-the-art in system-level design trade-off explorations for concurrent tasks running on embedded heterogeneous multiple processors. The targeted application domain covers complex embedded real-time multi-media and communication applications. This material is mainly based on research at IMEC and its international university network partners in this area over the last decade. In all, the material those in the digital signal processing industry will find here is bang up-to-date. 264 pp. Englisch. Seller Inventory # 9781402063282
Book Description Condition: New. Seller Inventory # 5238336-n
Book Description Gebunden. Condition: New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The first addressing the low-power design by doing system-level trade-offs of (dynamic concurrent) task scheduling  which does not fully depend on Dynamic Voltage Scaling (DVS) or Dynamic Power management (DPM)Highlights a set of solid system. Seller Inventory # 4094481